The first Young Architect Workshop (YArch ’19, pronounced “why arch”) will provide a forum for junior graduate students studying computer architecture and related fields to present early stage or on-going work and receive constructive feedback from experts in the field as well as from their peers. Students will also receive mentoring opportunities in the form of keynote talks, a panel discussion geared toward grooming young architects, and 1-on-1 meetings with established architects.
Students will receive feedback from experts both about their research topic in general and more specifically, their research directions. Students will also have an opportunity to receive valuable career advice from leaders in the field and to network with their peers and develop long-lasting, community-wide relationships.
Note: We are actively working towards securing funding to subsidize student participation in this workshop. We will post an update once we have more details.
The central theme of this workshop is to serve as a welcoming venue for junior graduate students to present their ongoing work and receive feedback from experts within the community. In addition, this workshop also aims to help early-stage graduate students in building connections both with their peers and established architects in the community. To this end, YArch will include:
– Route to Top-tier: Each submitted work will receive two or more expert reviews. The aim of these reviews will be to give early guidance on important boxes to check for the submitted work to be a future successful top tier conference paper.
– Meet an Architect: As part of the workshop, attendees will be paired with experts in their chosen research area to get feedback on their ongoing work and future research directions.
– Becoming an Architect: The workshop will include keynote talks from academic and industry leaders specifically geared towards early stage graduate students.
– Ask an Architect: The workshop will include a panel of established architects in industry and academia from whom students can seek career advice.
Eligibility: Applicants must be graduate students (Ph.D or Masters) in computer architecture and related fields who have completed less than 3 years of graduate school (Masters and/or PhD) at the time of the workshop. A note from the student’s research advisor attesting this is required as part of the submission.
Call for Submissions: Eligible students are invited to submit their early stage or on-going work to this workshop. Submitted work should not have been presented as part of a prior ACM/IEEE conference.
The workshop invites papers from all areas of computer architecture, broadly defined. Topics of interest include, but not limited to:
– Datacenter systems
– Hardware acceleration
– Memory hierarchy
– Parallel architectures
– Emerging technologies
Note: This workshop is not a venue for publication and there will be no formal proceedings.
Submission guidelines: The goal of this workshop is to help students think about a problem/idea in an holistic manner and communicate your ideas to the wider community, so that we can provide some valuable early-stage feedback. To this end, we encourage you to cover the following aspects in your submission:
– Scope of problem/idea: Provide clear context for and scope of the problem(s) or idea(s) you intend to work on. This will likely form the basis of the introduction/background sections of your future work(s).
– Solution: Provide an overview of the design and implementation aspects of your solution(s) to the problem(s) described above. Given this is on-going work, focus more on providing breadth than depth. For example, beside describing the design of your idea, enlist the various system aspects which your proposed solutions will affect (e.g. does your proposed solution affect coherence protocols?) and that if you plan to discuss these effects in your future submission(s).
– Evaluation methodology: Discuss the evaluation methodology you plan to adopt to test the efficacy of your ideas. For example, the workloads that you plan to use, the tools you’ll employ (e.g., architectural simulator, real world experiments, FPGA prototypes), etc.
– Related work: This can be the traditional related work section. Please specify if you plan to quantitatively compare against some prior work.
– Submissions must be PDF files, in 2-column, single-spaced, 10pt format.
– Submissions must be at most 2 pages long, not including references.
– Please have your research advisor send the workshop organizers an email with the following subject line “<Your name> meets YArch’19 eligibility requirements” to “email@example.com”.
– Submission site: Link
– Submission deadline: 11:59pm (PT), 15th January, 2019 (Tuesday)
Speakers and Panelists
Shaizeen Aga, AMD Research
Aasheesh Kolli, Pennsylvania State University
Arkaprava Basu, Indian Institute of Sciences
Joe Devietti, Univ. of Pennsylvania
Jayneel Gandhi, VMware Research
Akanksha Jain, Univ. of Texas at Austin
Nuwan Jayasena, AMD Research
Onur Kayiran, AMD Research
Samira Khan, Univ. of Virginia
Tushar Krishna, Georgia Tech
Benjamin Lee, Duke University
Andrew Lukefahr, Indiana University
Prashant Nair, Univ. of British Columbia
Adrian Sampson, Cornell
Joshua San Miguel, Univ. of Wisconsin
Sophia Shao, Nvidia Research
Abhayendra Singh, Google
Ashish Venkat, Univ. of Virginia
Jishen Zhao, Univ. of California at San Diego
Yuhao Zhu, Univ. of Rochester
<More to follow>