Hardware Design

Overview
The primary goal of the hardware is to create a low-cost, relatively high-speed signal processing paradigm, that can be easily constructed. Requirements placed on the speed are only applicable to data storage, enabling maximum wave form information to be obtained, since the plan is to do post-processing data correlation on a small cluster. This paradigm is not only easier to implement (as opposed to real time correlation), but also falls into the VLBI design paradigm, allowing for the plan of inter-university collaboration to occur. The initial plan was to construct a super-heterodyne receiver for continuum observations, and obtain the real and imaginary part of the transient signal through precision mixing (i.e. IQ Modulation). This initial investigation was conducted using SPICE to simulate the system, and prototype the circuit before purchasing components. Further investigation has revealed several engineering problems ranging from obtaining such a precise signal, to issues with constant voltage signal lines in a PCB circuit. As such, we have decided that capturing the signal in real time at a lower frequency would be the best option. Additionally, when considering the multi-spectral properties of the wide band antenna design (see other section), such a system would be frequency independent, only requiring a modification of the first mixer.

The hardware is being designed to integrate medium level components into a system. This allows for more design control without being required to design and build the low level components. For example, amplifiers and mixers are being purchased as SMD components instead of being constructed with transistors and transformers. Furthermore, all of the PCBs have been designed using Design Spark PCB, and have been manufactured using OSH Park crowd sourced PCB manufacturing. Future designs pending funding will be manufactured in house.

Receiver Design Investigation

Several receiver designs were considered, and were simulated mathematically in Mathematica. A random set of numbers were generate and interpolate to formulate an amplitude and phase modulating function. This function was then used to vary a carrier signal at a specific known frequency. Mixer functionality was obtained via the multiplication operation, and filtering (specifically low-pass) was obtained by taking a Fourier transform of the signal, multiplying by a filter function (to weight the high frequency components), and then taking the inverse Fourier transform. All of the models were conducted numerically using discrete mathematics and DFTs. Additionally, LOs with sine waves and square waves were tested, and showed no significant difference, leading to the conclusion that for our intended system, a frequency synthesizer would not be needed. The following receiver designs were tested:

• IQ Modulation:
  1. Break into LO and LO90 Components (phase offset of 90 degrees)
  2. Filter the two paths with a low pass filter
  3. Apply another LO and LO90 to the I and Q modulations, respectively
  4. Apply another low pass filter to both channels
  5. Scale and compare the resultant channels
• 1-bit Multi-sample (Old VLBI)
  1. Down convert with a single LO
  2. Apply a low-pass filter
  3. Take a series of small window samples on the transient signal
  4. Assign either a 1 or -1 to the signal based on if the signal at the sample time is >0 or <0
  5. Take the small windows, and perform a Fourier transform, taking the Re and Im part corresponding to the frequency of interest
  6. Recombine the Re and Im samples in time and compare the resultant channels
• 2-bit Multi-sample (New VLBI)
  1. Down convert with a single LO
  2. Apply a low-pass filter
  3. Take a series of small window samples on the transient signal
  4. Assign either a 2, 1, -1 or -2 to the signal based on if the signal at the sample time is >0 or v0 or < v0, where v0 is a threshold voltage
  5. Take the small windows, and perform a Fourier transform, taking the Re and Im part corresponding to the frequency of interest
  6. Recombine the Re and Im samples in time and compare the resultant channels
• FX Channelizer
  1. Down convert with a single LO
  2. Apply a low-pass filter
  3. Take a series of small window samples on the transient signal
  4. Take the small windows, and perform a Fourier transform, taking the Re and Im part corresponding to the frequency of interest
  5. Recombine the Re and Im samples in time and compare the resultant channels

The figure above shows the four receiver types, comparing the input signal and the received signal for the different paradigms. It can be seen that the 1-bit and 2-bit multi-sample methods provide similar results, while the IQ modulation and FX Channelizer provide similar results, with the IQ modulation being the closest. The biggest issue here comes into processing power for the required signal, where in either case, an FPGA (or a more advanced poly-phase filter bank) would be needed. Further investigation is required, with the FX Channelizer being the most promising result (using a low sample FFT method). Note that the correlation would be done post-facto, with the computer recording the Re and Im bits after either FFT is performed. Furthermore, it should be noted that the IQ modulation would be far superior in terms of signal detection, as it could read the Re and Im components from a logarithmic amplifier.

First Stage Amplifier
The first iteration of the first stage amplifier consisted of four low noise amplifiers on a 50 ohm impedance matched PCB that is small enough to fit within a 2-inch diameter PVC pipe. The plan was to cool the amplifiers using a peltier element controlled by a TI temperature sensor IC. The temperature sensor IC would connect its sense port to an Atmel or Microchip MCU, which would in turn control the current through the peltier element via a digi-pot. The original design did not include a band pass filter and has since been jury-rigged to include one.

Other features missing on the original iteration included calibration mechanisms. These features have been added to the second iteration design, which will be generalized for operation in both the 408 MHz Yagi antenna and the Wide Band dish antenna.

Motor and Antenna controller
The Alt-Az mount on the telescope is a single-speed dual-axis slew drive operating with two 24V brushed motors. As a result, we have designed and implemented a MOSFET switching motor controller allowing for the motors to go forward and reverse. They work on 5V TTL logic that will be eventually connected to a MCU. The MCU will control the motor movement, the first stage amplifier temperature, and report position information to the main computer. The positioning information will be obtained via a 3-axis accelerometer and 3-axis magnetometer, and will implement position breaking via Opto-sensors placed on the mount. This MCU will also be responsible for relaying a calibration signal to the first stage amplifier board. Finally, this MCU will be connected to another MCU sitting near the controlling computer (connected via TxD and RxD lines). The MCU near the controlling computer will either connect via USB 2.0 or Ethernet to the controlling computer.