Current Ph.D. Advisees

Eric Homan
Eric Homan
Brain-Inspired Architectures
Ikenna Okafor
Ikenna Okafor
Acceleration of Deep Networks
Sonali Singh
Sonali Singh
Spiking Neural Network Architectures
Faysal Khan
Faysal Khan
Embedded Machine Learning Architectures
Akshay Ramanathan
Akshay Ramanathan
In-memory processing
Chonghan Lee
Chonghan Lee
Contextual Machine Inference
Zeinab Hakimi
Zeinab Hakimi
Distributed Camera Intelligence
Yi Zheng
Yi Zheng
Persistent Memory
Yixin Xu
Yixin Xu
Technology-Architecture CoDesign
Zheyu Li
Zheyu Li
Systolic In-Memory Architectures
Yi Xiao
Yi Xiao
3D Ferroelectric Circuits
Pingyi Huo
Pingyi Huo
In memory compute
Anusha Devulapally
Anusha Devulapally
Neuromorphic Machine Intelligence
Sadia Tumpa
Sadia Tumpa
Spiking Neural Networks
Tianyi Shen
Tianyi Shen
Industrial IoT

Current M.S. Students

Nelson Troncoso
Nelson Troncoso
Assistive Vision Technology
Hariram Thirucherai
Hariram Thirucherai
Tagless Cache Architectures
Tongguang Yu
Tongguang Yu
Ferroelectric Devices
Abhijeet Kumar
Abhijeet Kumar
Video Analytics
Abhishek Kumar
Abhishek Kumar
Assistive Technologies
Samuel Abrams Kumar
Samuel Abrams
Video Analytics
Viet Hoang Pham
Viet Hoang Pham
Smart Insect Traps

Ph.D. Alumni

Naga Challapalle
Naga Challapalle
Non-Von Neumann Computing
Peter Zientra
Peter Zientra
Neuromorphic Hardware
Nico Jao
Nico Jao
Embedded Memory-Logic Architectures
Sumita George
Sumita George
Memory Design Using Emerging Technologies
Srivatsa Rangachar
Srivatsa Rangachar
In-Memory Logic using Monolithic 3D
Jinhang Choi
Jinhang Choi
Context-Aware Design and Optimization of Embedded Deep Neural Network Architectures
Kaisheng Ma
Kaisheng Ma
Nonvolatile Processor
Wei-Yu Tsai
Wei-Yu (William) Tsai
Enabling New Computation Paradigms with Emerging Technologies
Advani, Siddharth
Siddarth Advani
Large-scale object recognition for embedded wearable platforms
Chandramoorthy, Nandhini
Nandini Chandramoorthy
UPDATE THIS
Kim, Moon Seok
Moon Seok Kim
Digital/mixed-signal circuit designs with steep slope III-V tunnel transistors
Lee, Chris
Chris S. Lee
Data dependent optimization vision architecture
Cotter, Matthew Joseph
Matthew Cotter
Enabling intelligent vision systems in a configurable multi-algorithm pipeline
Liu, Huichu
Huichu Liu
Device Circuit Interactions for Steep Switching Slope Devices
Xiao, Yang
Yang Xiao
Using attention to enhance efficiency in video-based computer systems
Xu, Cong
Cong Xu
Modeling, circuit design, and microarchitectural optimization of emerging resistive memory
Swaminathan, Karthik
Karthik Swaminathan
An examination of post-CMOS computing techniques using steep slope device-based architectures
Park, Mi Sun
Park, Mi Sun
Configurable accelerators for visual and text analytics
Park, Sungho
Sungho Park
System-on-Chip integration of heterogeneous accelerators for perceptual computing
Eze, Melvin
Melvin Eze
Sub-50 nm multi-segment interconnect design: A treatise on speed, reliability and signal integrity
Maashri, Ahmed Al
Ahmed Al Maashri
Accelerating design and implementation of embedded vision systems
Cho, Yong Cheol Peter
Peter Cho
Accelerating Cortical Processing for Real Time Neuromorphic Vision Systems
Kestur Vyasa Prasanna
Kestur Vyasa Prasanna
Domain-specific accelerators on reconfigurable platforms
DeBole, Michael
Michael DeBole
Configurable accelerators for video analytics
Saripalli, Vinay
Vinay Saripalli
Device and architecture co-design for ultra-low power logic using emerging tunneling-based devices
Mangalagiri, Prasanth
Prasanth Mangalagiri
A reliable design flow for platform FPGAs
Ricketts, Andrew Jonathan Sylvester
Andrew Ricketts
Towards minimizing the adverse effects of temperature on high performance digital systems
Eachempati, Soumya S.
Soumya Eachempati
Influence of emerging technologies on interconnect architectures
Yanamandra, Aditya
Aditya Yanamandra
Exploring power reliability tradeoffs in on-chip networks
Krishnan, Ramakrishnan
Ramakrishnan Krishnan
Analysis of failures in nanoscale devices
Bae, Sungmin
Sungmin Bae
Closing the gap between FPGA and ASICS: The applications of clock skew scheduling on FPGAs
Soundararajan, Niranjan
Niranjan Soundararjan
Addressing reliability issues in performance-critical processor structures
Irick, Kevin Maurice
Kevin Irick
A configurable platform for sensor and image processing
Kim, Jung Sub
Jung Sub Kim
High-performance signal processing on reconfigurable platforms
Nicopoulos, Chrysostomos A.
Chrysostomos Nicopoulus
Network-on-Chip architectures: A holistic design exploration
Pirretti, Matthew G.
Matthew Pirretti
Secure communications in sensor networks
Ramanarayanan, Rajaraman.
Rajaraman Ramanarayanan
Soft errors in logic circuits: Analysis and modeling
Lin, Ing-Chao
Ing-Chao Lin
System level power and reliability modeling
Srinivasan, Suresh
Suresh Srinivasan
Tackling power and reliability issues in field programmable gate arrays
Gayasen, Aman
Aman Gayasen
Implications of future technologies on the design of FPGAs
Theocharides, Theocharis
Theo Theocharides
Embedded hardware face detection for digital surveillance systems
Lee, Jooheung
Jooheung Lee
Efficient VLSI architectures for image and video signal processing algorithms
Link, Gregory M.
Greg Link
Temperature-aware computing
Saputra, Hendra
Hendra Saputra
Security issues in embedded system design
Degalahal, Vijay S. R.
Vijay Degalahal
Soft errors: Modeling and interactions with power optimizations
Li, Lin
Lin Li
Designing energy-efficient and reliable caches and interconnects
Tsai, Yuh-Fang
Yuh-Fang Tsai
Tools and techniques for leakage power analysis
Hu, Jie
Jie Hu
Orchestrating the compiler and microarchitecture for reducing cache energy
Kim, Soontae
Soontae Kim
Energy -efficient high performance cache architectures
Kim, Hyun Suk
Hyun Suk Kim
Energy -aware hardware and software optimizations for embedded systems

M.S. Alumni Students

Anupama Murthy
Anupama Murthy
Memory System Characterization of Java Applications
Rajendra Athavale
Rajendra Athavale
Annotation Based Energy Optimization for Java
Tendai P. Chinoda
Tendai P. Chinoda
Protecting Java Applications Against Decompilation via Control Flow Obfuscation
Samarjeet Tomar
Samarjeet Tomar
Characterizing and Optimizing Memory Energy in Java
Jeyran Hezavei
Jeyran Hezavei
Power Modeling and Optimization of Memories and Functional Units
Gandhi Thirugnanam
Gandhi Thirugnanam
Low Power Content Addressable Memory Design
David Charles
David Charles
Improving ILP with Instruction Reuse Cache Hierarchy
Jun Zhao
Jun Zhao
Influence of MPEG-4 Parameters on System Energy
Preeti Garg
Preeti Garg
Implementation of a Java Accelerator: Interfacing the Java Virtual Machine with the FPGA
Nandagopal Kirubanandan
Nandagopal Kirubanandan
Memory Energy Characterization and Optimization of SPEC2000 Benchmarks
Geethanjali Esakkimuthu
Geethanjali Esakkimuthu
Memory Energy: Modeling and Optimizations
Balaji Viswanathan
Balaji Viswanathan
OS Paging Issues for DRAM Energy Management
Hendra Saputra
Hendra Saputra
Compiler-directed Voltage Scaling for Reducing Energy
Xiheng Xu
Xiheng Xu
Evaluating Energy-Efficiency of Channel Coders
Yuh-Fang Tsai
Yuh-Fang Tsai
Characterization and Modeling for Run-time Leakage Reduction Techniques
Nachiket Shikhare
Nachiket Shikhare
Leakage Power Estimation Tool for CMOS Circuits
Ananth Hegde Ankadi
Ananth Hegde Ankadi
Variable Line Sized Cached DRAM
Grace Eberhardt
Grace Eberhardt
Analyzing the Common Language Runtime
Christopher Oster
Christopher Oster
A Workload Characterization and Performance Analysis of Multiprocessor Immersive Display Environments
Eric Swankoski
Eric Swankoski
Encryption and Security in SRAM FPGAs
Swapna Dontharaju
Swapna Dontharaju
Soft error analysis of CAMs
Kiyoung Lee
Kiyoung Lee
Leakage control mechanism for FPGAs
Kevin Irick
Kevin Irick
Embedded Face Detection
Thomas Richardson
Thomas Richardson
On-Chip Interconnects
Raghavan Ramadoss
Raghavan Ramadoss
Static and Runtime Optimization Strategies for Variation Aware MPSoC Platforms
Priya Sundararajan
Priya Sundararajan
Mapping Signal Processing Applications on FPGAs
Adil Sarwar
Adil Sarwar
Performance Evaluation of SystemC and Verilog for RTL Synthesis and System Modeling
Charles Addo-Quaye
Charles Addo-Quaye
Thermal-Aware Placement and Variation for Three Dimensional Network-on-Chip Designs
Han-Wei Chen
Han-Wei Chen
Impact of Circuit Degradation on Design Security of Field programmable Devices
Srinath Sridharan
Srinath Sridharan
Performance-Reliability Tradeoffs in designing reorder buffers
Amol Mupid
Amol Mupid
Variation-aware CAM structures
Kate Kilroy
Kate Kilroy
A Signal Based Approach to an Instrument Driver System
Srijith Rajmohan
Srijith Rajmohan
A Neural Network Based Classifier on Cell Broadband Engine
Aditi Rathi
Aditi Rathi
A GPU based implementation of Center Surround Distribution Distance Algorithm for feature recognition
Vikram Sampath Kumar
Vikram Sampath Kumar
Connected Component Labeling on FPGAs
Jesse Scott
Jesse Scott
FPGA based Image recognition
Dharav Dantara
Dharav Dantara
Reconfigurable Accelerators for Neuromorphic Systems
Aarti Chandrasekar
Aarti Chandrasekar
A Fine-Grained Dataflow Library for Reconfigurable Streaming Accelerators
Ravindhiran Mukundarajan
Ravindhiran Mukundarajan
Tunnel FET based Field Programmable Gate Arrays
Kyle Wray
Kyle Wray
A Game Theoretic Approach To Multi-Agent Systems In Highly Dynamic
Rohit Ranade
Rohit Ranade
Image processing using coupled oscillators
Anusha Chandrasekar
Anusha Chandrasekar
Depth Estimation using monocular cameras
Brigid Smith
Brigid Smith
Improving object recognition performance through semantic context extraction
Joshua Snyder
Joshua Snyder
Optimization and Hardware Acceleration of Consensus-based Matching and Tracking
Unsuk Heo
Unsuk Heo
A High-efficiency Switched-capacitance Htfet Charge Pump For Low-input-voltage Applications
Kameran Davis
Kameran Davis
Real Time Object Tracking On Active Pan Tilt Zoom Camera Using CMT
Jagdish Sabarad
Jagdish Sabarad
A Reconfigurable Accelerator For Neuromorphic Object Recognition
Komala Subhadra Madineedi
Komala Subhadra Madineedi
A platform for evaluating embedded multi-core systems
Jagruti Mohapatra
Jagruti Mohapatra
Prediction and assessment of ambient energy signals for energy harvesting systems
Priyanka Gomatam
Priyanka Gomatam
Object Recognition Using Structured Feature Extraction With A Reconfigurable Neurosynaptic Processor
Ikenna Okafor
Ikenna Okafor
Hardware Acceleration of Visual Search
Vinayaka Krishna
Vinayaka Krishna
Dense Convolutional Object Detection For Visual Assistive Systems on Mobile Platforms
Gus Smith
Gus Smith
Designing Processing in Memory Architectures Via Static Analysis on Real Programs
Jake Eden
Jake Eden
Employing Text Features for Visual Assistance in Navigation and Classification
Skyler Anderson
Skyler Anderson
Adaptive Neural Network Architectures for Power Aware Inference
Zeinab Hakimi
Zeinab Hakimi
Collaborative Inference for Distributed Camera System
Philip Shin
Philip Shin
Context-Aware Collaborative Object Recognition for Multi Camera Time Series Data
Steven Davis
Steven Davis
Reinforcement Learning: An Application to Maritime Navigation and Contact Avoidance
Dong Hyun Kim
Dong Hyun Kim
Sensor Aware Machine Learning for Edge Devices
Sahithi Ramipalli
Sahithi Ramipalli
A Processing-in-Memory Accelerator Architecture for Graph Analytics
Makesh Chandran
Makesh Chandran
Processing in-Memory Architecture Incorporating Systolic Dataflow for Deep Neural Networks
Grant Eden
Grant Eden
Using a UAV and Edge Computing to Identify and Throw Away Trash

Schreyers B.S. Honors Thesis (excluding IUG students)

Tianyi Shen
Tainyi Shen
Attention-based Human Activity Recognition
Shivran Muralidharan
Shivran Muralidharan
Addressing Overfitting Issues with Deep Learning Model for Video Action Recognition
David Matthew
David Matthew
The Glove Project: Allowing the Visually Impaired to Understand and Interact with their Environment
Thomas Kawchak
Thomas Kawchak
Indoor Localization for the Visually Impaired
Eric Gallante
Eric Gallante
The Accuracy of Rhythm Recognition with Convolutional Neural Networks on TrueNorth Processor
Ronald Caccese
Ronald Caccese
Comparing Integrate And Fire Neuron Circuits Using TFET And CMOS Technologies
Eugene Gallagher
Eugene Gallagher
A scalable FPGA platform for LADAR acquisition
Jacek Turowski
Jacek Turowski
Network-on-chip router design
Cedric Yoedt
Cedric Yoedt
Exploring the impact of soft-errors on memory cell design
Lan Vuong
Lan Vuong
Dynamic web design for multiple platforms
Brandon Rioja
Brandon Rioja
A remote execution framework for an embedded Java environment
Victor Lyuboslavsky
Victor Lyuboslavsky
Design of a databus charge recovery mechanism

Post Doctoral Scholars

Keni Qiu
Keni Qiu
Capital Normal University
Yuhua Liang
Yuhua Liang
Xidian University.
Xueqing Li
Xueqing Li
Assistant Professor, Tsinghua University
Ramesh Vaddi
Ramesh Vaddi
Assistant Professor, Sivan Nadar University
Yasuki Tanabe
Yasuki Tanabe
Researcher, Toshiba
Kevin Irick
Kevin Irick
CTO, SiliconScapes
DeBole, Michael
Michael DeBole
IBM Research
Yongseok Jin
Yongseok Jin
Intel
Luan Din
Luan Din
Madhu Mutyam
Madhu Mutyam
Professor, IIT Madras

High School K-12 Summer Interns

Brent McNeel
Brent McNeel
Tyrone Area HS
Isabelle Fetzer
Isabelle Fetzer
Grier School
Eva McCracken
Eva McCracken
Grier School
Jack Lewis
Jack Lewis
Tyrone Area HS
Benjamin Hostler
Benjamin Hostler
Hannah Schuster
Hannah Schuster
Aiden Call
Aiden Call
Megan Koegler
Megan Koegler

Research Experience for Teachers

Justin Bush
Justin Bush
Tyrone Area School District
Kelly Forest
Kelly Forest
Grier School

International Exchange Summer Interns

Gabriel R. Franzoni
Gabriel R. Franzoni
Bernardo Godinho
Bernardo Godinho